4707 dey road liverpool, n.y. 13088 (315) 701-6751 m.s.kennedy corp. iso 9001 certified by dscc features: extremely fast - 500v/s wide supply range 15v to 45v vmos output, no s.o.a. restrictions large gain-bandwidth product fet input electrically isolated case 800ma typical output current 1461 high speed/voltage op amp the msk 1461 is a state of the art high speed fet input operational amplifier. the distinguishing characteristic of the msk 1461 is its unique vmos output stage which completely eliminates the safe operating area restrictions associated with secondary breakdown of bipolar transistor output stage op-amps. freedom from secondary break- down allows the 1461 to handle large output currents at any voltage level limited only by transistor junction tempera- ture. 115 db of open loop gain gives the 1461 high closed loop gain accuracy and the typical 1.0mv of input offset voltage will fit well in any error budget. a 500 v/s slew rate and 1200 mhz gain bandwidth product make the 1461 an outstanding high-speed op-amp. a single external capacitor is used for compensation and output current limiting is user programmable through the selection of two external resistors. description: mil-prf-38534 certified 8 9 10 11 12 13 14 output positive current limit positive power supply compensation compensation offset adjust offset adjust 1 2 3 4 5 6 7 inverting input non-inverting input no connection no connection negative power supply negative current limit no connection pin-out information typical applications video yoke drivers video distribution amplifiers high accuracy audio amplification high speed ate pin drivers equivalent schematic rev. b 8/00 1
45v 800ma 25v 12c/w v in =0v v cm =0v quiescent current input bias current input offset current output voltage swing junction to case v in =0v a v =-10v/v bal. pins=n/c r pot =10k w to +v cc v cm =0v either input f=dc f=10khz v cm =22v r l =50 w a v =-5v/v r l =1k w r l =33 w a v =-5v/v t j <175c 0.1% 10v step v out =10v r l =1k w a v =-5v/v r l =1k w f=100hz f=100khz static supply voltage range thermal resistance input input offset voltage input offset voltage drift input offset adjust input impedance common mode range common mode rejection ratio output output current, peak settling time transfer characteristics slew rate open loop voltage gain gain bandwidth product absolute maximum ratings v cc i out v in r th t st t ld t c t j v ma ma c/w mv v/c v pa na pa na w v db v v ma ns v/s db mhz parameter electrical specifications units test conditions max. 45 28 - 15 8.0 - - 300 - - - - - - - - - 800 - - - typ. - 19 - 11 1.0 10 8.0 10 - 5.0 - 3x10 24 100 31 33 800 400 500 106 1200 min. 15 - - - - - - - - - - - 22 90 27 30 600 - 200 90 800 max. 45 25 35 12 5.0 50 - 300 100 - - - - - - - - 800 - - - typ. - 19 21 11 1.0 6.0 8.0 10 10 5.0 5.0 3x10 24 100 31 33 800 400 500 106 1200 min. 15 - - - - - - - - - - - 22 90 27 30 600 - 200 90 800 msk 1461 msk 1461b - 1 2,3 - 1 2,3 - 1 2,3 - - - - 4 4 4 4 4 4 4 4 group a subgroup 12 12 3 3 2 3 3 3 3 3 3 3 3 1 2 3 4 5 6 7 notes: r sc =0 w and v cc =36vdc unless otherwise specified. av=-1, measured in false summing junction circuit. devices shall be capable of meeting the parameter, but need not be tested. typical parameters are for reference only. industrial grade devices shall be tested to subgroups 1 and 4 unless otherwise specified. military grade devices ("b" suffix) shall be 100% tested to subgroups 1,2,3 and 4. subgroups 5 and 6 testing available upon request. subgroup 1,4 subgroup 2,5 subgroup 3,6 t c =+25c t j =+125c t a =-55c -65c to +150c 300c -55c to +125c -40c to 85c +175c storage temperature range lead temperature range (10 seconds) case operating temperature (msk 1461b) (msk 1461) junction temperature supply voltage output current differential input voltage thermal resistance junction to case (output devices only) rev. b 8/00 2
1.) find driver power dissipation p d = [(quiescent current) x (+v s - (-v s ))] + [(+v s -v o ) x i out ] = [(50ma) x (80v)] + [(20v) x (0.05a)] = 4w + 1.0w = 5watts 2.) for conservative design, set t j =+125c. 3.) for this example, worst case t a =+50c 4.) r q jc = 12c/w from msk 1461b data sheet 5.) r q cs = 0.15c/w for most thermal greases 6.) rearrange governing equation to solve for r q sa r q sa = ((t j - t a )/p d ) - (r q jc ) - (r q cs ) = ((125c - 50c) / 5w) - (12c/w) - (.15c/w) @ 2.85c/w the heat sink in this example must have a thermal resistance of no more than 2.85c/w to maintain a junc- tion temperature of no more than +125c . application notes heat sinking to select the correct heat sink for your application, refer to the thermal model and governing equation below. thermal model: governing equation: current limit the output current of the msk 1461 is internally lim- ited to approximately 750ma by two 0.8 w internal cur- rent limit resistors. additional current limit can be achieved through the use of two external current limit resistors. one resistor (+r sc ) limits the positive output current and the other (-r sc ) limits the negative output current. the value of the current limit resistors can be determined as follows: since the 0.65v term is obtained from the base to emitter voltage drop of a bipolar transistor, the equation only holds true for +25c operation. as case tempera- ture increases, the 0.65v term will decrease making the actual current limit set point decrease slightly. r sc = [(0.65v/i lim ) - 0.8 w ] t j =p d x (r q jc + r q cs + r q sa ) + t a where t j = junction temperature p d = total power dissipation r q jc = junction to case thermal resistance r q cs = case to heat sink thermal resistance r q sa = heat sink to ambient thermal resistance t c = case temperature t a = ambient temperature t s = sink temperature example: in our example the amplifier application requires the output to drive a 20 volt peak sine wave across a 400 w load for 50ma of peak output current. for a worst case analysis we will treat the 50ma peak output current as a d.c. output current. the power supplies shall be set to 40vdc. the following schematic illustrates how to connect each current limit resistor: in any designer who has worked with power operational amplifiers is familiar with safe operating area (s.o.a.) curves. s.o.a. curves are a graphical representation of the following three power limiting factors of any bipolar transistor output op-amp. 1. wire bond current carrying capability 2. transistor junction temperature 3. secondary breakdown limitations since the msk 1461 utilizes a mosfet output, there are no secondary breakdown limitations and therefore no need for s.o.a. curves. the only limitation on output power is the junction temperature of the output drive tran- sistors. whenever possible, junction temperature should be kept below 150c to ensure high reliability. see "heat sinking" for more information involving junction tempera- ture calculations. safe operating area both the negative and the positive power supplies must be effectively decoupled with a high and low frequency bypass circuit to avoid power supply induced oscillation. an effective decoupling scheme consists of a 0.1f ce- ramic capacitor in parallel with a 4.7f tantalum capaci- tor from each power supply pin to ground. power supply bypassing input offset adjust connection rev. b 8/00 3
typical performance curves rev. b 8/00 4
the information contained herein is believed to be accurate at the time of printing. msk reserves the right to make changes to its products or specifications without notice, however, and assumes no liability for the use of its products. mechanical specifications rev. b 8/00 m.s. kennedy corp. 4707 dey road, liverpool, new york 13088 phone (315) 701-6751 fax (315) 701-6752 www.mskenndy.com screening level part number MSK1461 MSK1461b industrial military-mil-prf-38534 ordering information note: all dimensions are 0.010 unless otherwise labeled. esd triangle indicates pin 1. 5
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